Chips 2020: A Guide to the Future of Nanoelectronics (The Frontiers Collection)

Chips 2020: A Guide to the Future of Nanoelectronics (The Frontiers Collection)

Language: English

Pages: 477

ISBN: 3642223990

Format: PDF / Kindle (mobi) / ePub

Chips 2020: A Guide to the Future of Nanoelectronics (The Frontiers Collection)

Language: English

Pages: 477

ISBN: 3642223990

Format: PDF / Kindle (mobi) / ePub


The chips in present-day cell phones already contain billions of sub-100-nanometer transistors. By 2020, however, we will see systems-on-chips with trillions of 10-nanometer transistors. But this will be the end of the miniaturization, because yet smaller transistors, containing just a few control atoms, are subject to statistical fluctuations and thus no longer useful. We also need to worry about a potential energy crisis, because in less than five years from now, with current chip technology, the internet alone would consume the total global electrical power!

This book presents a new, sustainable roadmap towards ultra-low-energy (femto-Joule), high-performance electronics. The focus is on the energy-efficiency of the various chip functions: sensing, processing, and communication, in a top-down spirit involving new architectures such as silicon brains, ultra-low-voltage circuits, energy harvesting, and 3D silicon technologies. Recognized world leaders from industry and from the research community share their views of this nanoelectronics future. They discuss, among other things, ubiquitous communication based on mobile companions, health and care supported by autonomous implants and by personal carebots, safe and efficient mobility assisted by co-pilots equipped with intelligent micro-electromechanical systems, and internet-based education for a billion people from kindergarden to retirement. This book should help and interest all those who will have to make decisions associated with future electronics: students, graduates, educators, and researchers, as well as managers, investors, and policy makers.

Introduction: Towards Sustainable 2020 Nanoelectronics.- From Microelectronics to Nanoelectronics.- The Future of Eight Chip Technologies.- Analog–Digital Interfaces.- Interconnects and Transceivers.- Requirements and Markets for Nanoelectronics.- ITRS: The International Technology Roadmap for Semiconductors.- Nanolithography.- Power-Efficient Design Challenges.- Superprocessors and Supercomputers.- Towards Terabit Memories.- 3D Integration for Wireless Multimedia.- The Next-Generation Mobile User-Experience.- MEMS (Micro-Electro-Mechanical Systems) for Automotive and Consumer.- Vision Sensors and Cameras.- Digital Neural Networks for New Media.- Retinal Implants for Blind Patients.- Silicon Brains.- Energy Harvesting and Chip Autonomy.- The Energy Crisis.- The Extreme-Technology Industry.- Education and Research for the Age of Nanoelectronics.- 2020 World with Chips.

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this growth is needed worldwide, because new chips provide the technology foundation for all those products and services that shape our lives. However, the concern is justified that this truth is not the perception of the public in the first decades of the new millennium. How can we work towards a broad, sustained commitment to an innovation ecosystem involving education, research, business, and public policy? Reminding ourselves of the 10x programs invoked in Chap. 2 to describe major milestones

Side-loading Si dioxide SiGe Sigmoid transfer functions Signal evaluation Signal regenerator Signal-to-noise ratio (SNR) Signal transfer function Signal-transmission Silicon brains Silicon compact disk Silicon interposer Silicon-on-insulator (SOI) Silicon open source SIMD FPU. See Single-Instruction Multiple-Data Floating-Point Units (SIMD FPUs) SIMOX Single electrons Single-electron transistor (SET) Single-Instruction Multiple-Data Floating-Point Units (SIMD FPUs)

master graph, because it plots the speed against the energy per operation. Certainly in mobiles, the issue is: At which energy can you realize speed? We have entered the HIPERLOGIC data of above for 16 × 16 bit multipliers and some recently reported results from ultra-large-scale media processors. These contain hundreds to thousands of arithmetic processing elements (PEs), mostly organized as 4 × 4 bit adder/multipliers. The best reported achieves 27 MOPS with 12 μW at a supply voltage of 340 mV

University of Ulm, Albert-Einstein-Allee 43, Ulm 89081, Germany info@albrecht-rothermel.de Lambert SpaanenburgDepartment of Electrical & Information Technology, Lund University, P.O. Box 118, 22100 Lund, Sweden Lambert.Spaanenburg@eit.lth.se Dirk SpreemannHSG-IMIT – Institute of Micromachining and Information Technology, Wilhelm-Schickard-Strasse 10, 78052 Villingen-Schwenningen, Germany Kai WeberSystem z Core Verification Lead, IBM Systems & Technology Group, Technology Development,

interaction with wide-bandwidth architectures, toward high-quality, cost-effective multimedia. In Chap. 13 Greg Delagi, Senior Vice-President for Wireless Systems at Texas Instruments, takes on the full perspective of the personal mobile companion of 2020:3D imaging and display, Gesture interface, Integrated projection, Object and face recognition, Context awareness, Internet of things Brain–machine interface, Body-area network connection. His chapter is the most explicit catalog of

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